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71M6543F/71M6543G Data Sheet
Table 2. Required CE Code and Settings for CT Sensors
Comments
Slots not enabled
I/O RAM
Mnemonic
FIR_LEN[1:0]
ADC_DIV
PLL_FAST
MUX_DIV[3:0]
MUX0_SEL[3:0]
MUX1_SEL[3:0]
MUX2_SEL[3:0]
MUX3_SEL[3:0]
MUX4_SEL[3:0]
MUX5_SEL[3:0]
MUX6_SEL[3:0]
MUX7_SEL[3:0]
MUX8_SEL[3:0]
MUX9_SEL[3:0]
MUX10_SEL[3:0]
RMT2_E
RMT4_E
RMT6_E
DIFF0_E
DIFF2_E
DIFF4_E
DIFF6_E
PRE_E
EQU[2:0]
CE Code
Equation(s)
Current Sensor Type
Applicable Figures
Notes:
I/O RAM
Location
210C[2:1]
2200[5]
2200[4]
2100[7:4]
2105[3:0]
2105[7:4]
2104[3:0]
2104[7:4]
2103[3:0]
2103[7:4]
2102[3:0]
2102[7:4]
2101[3:0]
2101[7:4]
2100[3:0]
2709[3]
2709[4]
2709[5]
210C[4]
210C[5]
210C[6]
210C[7]
2704[5]
2106[7:5]
I/O RAM Setting
(Hex)
1 288 cycles
0 Fast
1 19.66 MHz
7 See note 1
2 Slot 0 is IADC 2 -IADC3
(IA)
8 Slot 1 is VADC 8
(VA)
4 Slot 2 is IADC 4 -IADC5
(IB)
9 Slot 3 is VADC 9
(VB)
6 Slot 4 is IADC 6 -IADC7
(IC)
A Slot 5 is VADC 10
(VC)
0 Slot 6 is IADC0-IADC1
(IN – See note 2)
0
0
0
0
0 Local Sensor IADC2-IADC3
0 Local Sensor IADC4-IADC5
0 Local Sensor IADC6-IADC7
1 Differential IADC0-IADC1
1 Differential IADC2-IADC3
1 Differential IADC4-IADC5
1 Differential IADC6-IADC7
0 IADC0-IADC1 Gain = 1
5 IA*VA + IB*VB + IC*VC
ce43a02
5
4 Current Transformers (CTs)
Figure 3 , Figure 4 and Figure 32
1. MUX_DIV[3:0] must be set to 0 while writing the other RAM locations in this table.
2. IN is the optional Neutral Current.
Maxim updates the CE code periodically. Contact your local Maxim representative to obtain the
latest CE code and the associated settings.
16
v2
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